PMG4 Architecture

hugheba

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Apple throws around numbers and speeds for bus. But with as fast as some of these can be, isn't there still bottlenecks that arise?

I have little knowledge of the system architecture of these machines and would like to learn more. And like many others I'm a visual learner.

Below is a photo from Apples web site showing their latest PMG4 architecture. Attached is a copy I've updated by adding the bus speed for the L3 cache. Could those of you that have fully grasped the rest of the architecture and it's meanings fill in the blanks...( bus description/name, speed, and whether or not its a bottleneck).


architecturetop08132002.jpg


Please make revisions and/or corrections and post.

Please note, before this is taken off topic (i.e. dream machine), this is for those who don't quite understand the interaction between all of these different components to better understand the Mac architecture.
 

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