PPC970 at WWDC

MacBidouille posted some more information on their data.

Contacted about the too great similarity of the benchs which we received and those published by Barefeats, our source said to us that APPLE had taken the figures of the P IV and the dual 1,42 on the site of Barefeats and used their protocol of test. For Bryce, this is the explanation that we obtained: "I would have to tell you, the benchmarks bryce... are made with a beta of the next version of bryce, which will arrive in July or August of this year. Version 6 will support multi- processors configurations ... This beta version of Bryce 6 is available on some P2P sites, notably hotline. The true file is Corel Bryce 6 Beta.sit, and it's about 91.2 MB."
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They also reiterated that they clearly stated these benchmarks to be a rumor, not a truth.
In the Fora it was repeated that the originating source deserves credibility. So MacBidouille itself is in good faith here, and does not try to hype anything.
 
They also reiterated that they clearly stated these benchmarks to be a rumor, not a truth.
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Why bother posting rumors (*aka hypothetical benchmarks passed on by dubious sources with no means to verify*) if you don't trust your source?

It sounds like they're waffling, and doing the back peddle two step.

As I've said, most likely the only 970 Macs are in Cupertino. Developers do get test machines from time to time, but it's becoming increasingly rare under the reign of Steve. Apple can test all the current software in house, and there would be little reason to risk letting the cat out of the bag... Especially if WWDC will only be the announcement of the 970 Mac, not the release, which will probably come 4-6 weeks later.
 
**just a note - serpicolugnut posted his reply as a new thread by mistake, and I merged it with this thread. sorry for the confusion ;)
 
The point is a lot of people are bithching about tiny differences in the results, not doubting them as a whole. The benchmarks of MacBidouille are in line with common expectations and earlier projected performance values. MacBidouille received an e-mail with these banches and posted it as a rumor, reliable but not absolutely reliable, since they didn't test the machines themselves. People across the net have reacted as if MacBidouille had revealde the ultimate truth about the PPC 970, while they just posted some benchmarks, made in march, on not-final machines with an alpha OS. Of course the data is not 100% accurate, but people keep whining about it.

Moreover they are not the only ones that are both outside the US and have info about the 970. A lot of sites and fora are reporting on alleged inside information, and not all of them are physically located anywhere near Infinite Loop. Remember one of the first live rumors on the PPC 970 came from Germany, from CeBit, where the IBM blades were to be presented. And it was IBM Europe which posted the press release that was pulled later with more specs.

MacBidouille's results are in line with earlier specs found e.g. in the AppleInsider Fora and are partially corroborated byu reports in MacWhispers and now also on Macnews.net.tc So why do they have to "backpedal"?

As long as Steve Jobs himself doesn't say "Look here we have the new PPC 970 Macs" we don't know anything for sure. The PPC 970 is however the best processor in the market right now and that's not a secret. Of course there are a lot of test samples around the world! How do you think developers are going to code for a processor they've never seen before? Or test their programs? No-one get's a full featured production-ready PowerMac, but they get a working system with the processor in it. Hence they can run benchmarks and compare them to other benchmarks: where's the miracle? The surprise in ony in the actual values they get, not in the fact that they have ways of obtaining them.
 
Hmm, I would like to point out something:

Someone mentioned earlier about not knowing what the 32-bit performance on the 970 will be. Well, here is the performance hit for running 32-bit versus 64-bit: 0%.

Granted, this does not take into account optimizing for the wide-n-deep pipeline of the 970, but to state again what others have also said: the PPC specification is a 64-bit one, with the ability to allow for 32-bit sub-specifications. Plus, there have been 16-bit and 8-bit instructions on PPC chips since their conception as well. All a 64-bit PPC chip does is widen the registers to 64 bits, and add the instructions to utilize all 64 bits in the registers.

Now here is the performance gain for using 64-bit ops where you use 32-bit ops: 0%. Yep, nothing.

Now the real gem that makes the 970 a good chip is the design of the pipeline. This sucker wants a deep pipeline like the P4 to be able to reach high clock speeds, but also wants a wide pipeline to ensure MANY instructions are on the chip at the same time. Ars stated that the 970 could hold ~160 instructions on-chip at one time. The P4 can only hold ~20-40.

What this means in real terms is: the CPU is grinding away at a lot of code at once, running one massive engine. This, coupled with IBM's work on the POWER4 chip which this is derived from means that the 970 will be a solid, solid chip.

The exact figures will never be known until we see boxes with 970s in them though.

Edit: I said a couple things, but only covered one... whee.
 
Originally posted by Krevinek


Now the real gem that makes the 970 a good chip is the design of the pipeline. This sucker wants a deep pipeline like the P4 to be able to reach high clock speeds, but also wants a wide pipeline to ensure MANY instructions are on the chip at the same time. Ars stated that the 970 could hold ~160 instructions on-chip at one time. The P4 can only hold ~20-40.

What this means in real terms is: the CPU is grinding away at a lot of code at once, running one massive engine. This, coupled with IBM's work on the POWER4 chip which this is derived from means that the 970 will be a solid, solid chip.
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What happens when the processor is sent an interupt? Would all of the ~160 need to be dropped?
 
to Rhino_G3: No, since interrupts merely 'pause' current execution and return. In a multithreaded environment, you can change the stack/code being used... although that doesn't take effect until the interrupt returns.

The only time the big pipe needs to be cleaned is if it makes a wrong prediction for a branch.

To fryke: Altivec is about 160 instructions, yes.... although I was a bit off on my numbers. From the article itself:
the 970 can have a whopping 200 instructions on-chip in various stages of execution, a number that dwarfs not only the G4e's 16-instruction window but also the P4's 126-instruction one.
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Originally posted by Krevinek
to Rhino_G3: No, since interrupts merely 'pause' current execution and return. In a multithreaded environment, you can change the stack/code being used... although that doesn't take effect until the interrupt returns.
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Ahh yes, you're correct.
It's been quite a while since my PC Architecture class. :D
 
Yeah, it is fresh in my mind since I am doing some embedded work which requires me to write code using interrupts extensively... whee.
 
my mate is thinking of buying a new 970 when they come out he currently has an eMac 800 and an iBook 600 i think the low end g4 will get a speed boost but the high end will be getting new 970's installed and a higher cache, DDR ram, and higher capacity and speed boosted HDD's. I think apple will start to sell bundles such as iPod and iMac bundles. et al
 
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